Satoshi Matsuokaさん(@ProfMatsuoka)のカレンダー・ブログ形式Twitter | meyou [ミーユー]

Internal @intelMemo Leak Reveals They’re Impressed with @AMD Competition from AMD is especially tough in #HPC: performance driven by # of cores and # of memory channels (or memory bandwidth). Intel is challenged on both fronts. eteknix.com/intel-internal… pic.twitter.com/Xi5NiSmkYC

Researchers have proposed a new proactive fault-tolerant mechanism using reinforcement learning to optimize energy efficiency and performance in NoCs, which allows routers to switch among four different fault-tolerant operations. ieeexplore.ieee.org/document/87148… pic.twitter.com/ECOPDZgS2k

Prof @_onurmutlu_receiving the @acmsigmicroMaurice Wilkes award @ISCAConfOrg2019 pic.twitter.com/zQtVzVFCyp

Norrod: "So in thinking about it, in the original strategy, Milan was where we expected to be back to IPC (or better) parity across all workloads. Even with Intel's road map delays, we have continued to execute within a quarter of when we said we were going to execute." twitter.com/anandtech/stat…

MLPerfが推論ベンチマーク・スイート「MLPerf Inference v0.5」を発表。画像分類、物体検出、機械翻訳向けに5つのベンチマーク。mlperf.org/press#mlperf-i… #MLPerf

Missed #ISC19? You can take a virtual @ISChpcbooth tour with @HPCwire Here's the one for @cray_inc youtube.com/watch?v=or0ip9… #HPC #Exascale

Average tech salaries in 10 U.S. cities: San Francisco: $145,000 Seattle: $138,000 New York: $133,000 Los Angeles: $128,000 Austin: $125,000 Boston: $127,000 Washington: $123,000 Denver: $117,000 Chicago: $114,000 San Diego: $113,000 Source: Hired

Investor attempts to halt @HPE's $1.3bn acquisition of @cray_inc- proposes class-action lawsuit Probability of success seems low to me Obviously, the @TheRegisterheadline is much more interesting! theregister.co.uk/2019/06/24/cra… #HPC #AI #Exascale pic.twitter.com/zF6c3BLZAn

Optimizing and Benchmarking Large-Scale #DeepLearning - @thoeflerpresentation at #ISC19 #MachineLearning Day htor.inf.ethz.ch/publications/i… #HPC pic.twitter.com/xFfDMhzqew

Performance Reproducibility in #HPC and #DeepLearning - @thoeflerat #ISC19 Numerical Reproducibility at #Exascale Workshop htor.inf.ethz.ch/publications/i… pic.twitter.com/mrLW8rJg59

Patterson Keynote: Current Neural Network Architecture Debate: TPU, GPU, FPGA, CPU, ..... Everyone and his uncle wants to build you an #AI chip 😊 This slides does not even mention the Intel Xe #GPU! pic.twitter.com/VR1FxSRtb8

Patterson Keynote: Pitfall #8: Not leveraging large batch size Fallacy #9: ML ASICs are inflexible Fallacy #10: Can keep increasing training compute at same rate as the past - 10X per year to push the state of the training accuracy #HPC #AI pic.twitter.com/zEjckAkNFo

Domain-Specific Architectures for Deep Neural Networks: 10 Fallacies and Pitfalls 👍 Keynote by David Paterson Fallacy: Misbelief widely held Pitfall: Easily made mistake mlforsystems.org/assets/slides/… #HPC #AI #MooresLaw pic.twitter.com/YWwYHwAG0r

【クローズアップ科学】日本最高位のスパコン「ＡＢＣＩ」 世界最高速のディープラーニング special.sankei.com/a/life/article… via @Sankei_news

All slides from my talks at #ISC19 are now online: Data Centric Parallel Programming (htor.inf.ethz.ch/publications/i…), Green Graph500 BoF (htor.inf.ethz.ch/publications/i…), #deeplearning at ML Day (htor.inf.ethz.ch/publications/i…), Keynote at Reproducibility Workshop (htor.inf.ethz.ch/publications/i…) #hpc :-)

On this day in 2010: iPhone 4 released iPhone apps that didn’t exist then: Instagram Snapchat Netflix app Lyft Siri FB Messenger WeChat Wish Bitmoji Slack Apple Maps Alexa Tinder TikTok Candy Crush Apple Music UberEats pic.twitter.com/WJZay8HvfH

=> "SoftBank chairman says he did not order Arm to stop shipping to Huawei", Jun 22, 2019 digitimes.com/news/a20190622… Jun 22, 2019 youtube.com/watch?v=nBYVSv… A misunderstanding that, especially in China, that I have stopped Arm shipments into China, that is a complete misunderstanding, pic.twitter.com/wDUAb3A5oh

Alan Turing FRS, the mathematician and founding figure of computer science and artificial intelligence was born #Onthisday in 1912. pic.twitter.com/dODm8q6Znp

This is a scalable DNN acceleration architecture. Huawei already uses Da Vinci in their Ascend series of chips that span from 1 mW to 300 W and from 20 MOPS to 300 TOPS. Ascend chips are found inside Huawei's Atlas platform which includes modules, PCIe cards, and edge stations.

Right before the weekend Huawei announced the Kirin 810. Though the SoC is largely incremental over the 710, the interesting tidbit is the new NPU which no longer uses Cambricon's IP but Instead their own NPU based on the Da Vinci arch (Huawei will present the arch at Hot Chips).